FIG. 1 is a schematic of a prior art variable gain amplifier. Transistors 102 and 108 form two of several discrete gain stages for the variable gain amplifier. Their gates are DC biased from diode connected current mirror transistor 101 through isolating resistor 130. Transistors 104 and 106 are common gate amplifiers which, with transistors 102 and 108, form cascode amplifiers, known to those skilled in the art. The gates of transistors 104 and 106 are connected to diode connected transistor 103 with node voltage VBIAS2. The drains of transistors 104 and 106 are connected together, and to inductor 140 for tuning and biasing. The output signal, VOUT, is typically connected to the next stage, possibly through a series capacitor not shown that could be part of a matching network, or just a DC block. The next stage might typically be another amplifying transistor such as the input stage of a mixer.
Transistors 105 and 107 are switching transistors having sources connected to the sources of transistors 104 and 106, respectively. Their gates are driven by voltages VL1 and VL2 from interface circuits not shown. When VL1 and VL2 are low, transistors 105 and 107 are off and the DC current from transistors 102 and 108 flow in transistors 104 and 106, respectively. For this case, the variable gain amplifier achieves maximum gain because all of signal current from the drains of transistors 102 and 108 flows through transistors 104 and 106 to the load formed by inductor 140. If either VL1 or VL2 are high, the current from transistor 102 or 108 is steered away from transistors 104 and 106, respectively, resulting in a smaller signal at the output. The relative size of transistors 102 and 108 might typically be chosen to be 2 to 1, for an approximate gain step of 6 dB, although this is a degree of freedom and can vary according to the design. More stages can be added for additional gain steps for broader gain variation/control.
A limitation of the prior art shown in FIG. 1 is that when either VL1 or VL2 are high, the drain voltage of transistor 102 (V1) or transistor 108 (V2) increases (e.g., V1 or V2 may increase by 300-600 mV). This causes the drain current of transistor 102 or 108 to increase by 30-50%, depending on the short channel affects of the transistor (channel length modulation and drain induced barrier lowering). Thus, the DC current and power of the variable gain amplifier increase as the gain is reduced. Further, as the current varies with gain setting, the input capacitance of the transistors changes, degrading the input match (S11) of the variable gain amplifier. If the swing in VL1 and VL2 is reduced to lesson the impact of this, some of the current that is meant to be diverted away for gain control remains, causing the gain step to be other than the design value, and to possibly vary with process, temperature, and supply voltage.